Technical Field
The disclosure relates in general to a semiconductor device, and more particularly to a semiconductor device with a Through Silicon Via (TSV) structure.
Description of the Related Art
In recent years, 2.5D (dimensional) and 3D packages are in great demand due to the increased levels of integration they provide. A so called through silicon via (TSV) structure is provided to realize the electrical interconnections in the 2.5D and 3D package. During manufacturing the 2.5D and 3D package, a pad and an under bump metal (UBM) are commonly used to electrically connect each of TSV structures in different wafers. However, if the amount of the UBM is increased, the process cost will also be increased, and the chip performance may be degraded.